A logarithmic response CMOS image sensor with on-chip calibration

A logarithmic response CMOS image sensor with on-chip calibration
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DOI:
10.1109/4.859503
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发表时间:
2000-08-01
影响因子:
5.4
通讯作者:
Bogaerts, J
Bogaerts, J
中科院分区:
工程技术1区
文献类型:
--
作者:
Kavadias, S;Dierickx, B;Bogaerts, J

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具有对数响应的CMOS型图像传感器在需要高动态范围的应用中是很有吸引力的器件。它们的优点是高动态范围,缺点是对制作过程中引入的像素参数变化的敏感性。这会产生相当大的固定图案噪声(FPN),除非使用像素校准,否则会降低图像质量。本文介绍了一种利用片上校准来消除FPN的技术,其中消除了像素阈值电压变化的影响,设计了一种基于五管有源像素结构的图像传感器,并进行了制作和测试。该传感器由525×525个像素组成,大小为7.5微米×10微米,采用0.5微米工艺制造,动态范围为120分贝,FPN为输出信号范围的2.5%。
CMOS image sensors with logarithmic response are attractive devices for applications where a high dynamic range is required. Their strong point is the high dynamic range, Their weak point is the sensitivity to pixel parameter variations introduced during fabrication. This gives rise to a considerable fixed pattern noise (FPN) that deteriorates the image quality unless pixel calibration is used. In the present work a technique to remove the FPN by employing on-chip calibration is introduced, where the effect of threshold voltage variations in pixels is cancelled, An image sensor based on an active pixel structure with five transistors has been designed, fabricated, and tested. The sensor consists of 525 x 525 pixels measuring 7.5 mu m x 10 mu m, and is fabricated in a 0.5-mu m CMOS process, The measured dynamic range is 120 dB while the FPN is 2.5% of the output signal range.