Effect of BTI Degradation on Transistor Variability in Advanced Semiconductor Technologies
Effect of BTI Degradation on Transistor Variability in Advanced Semiconductor Technologies
复制标题
DOI：
10.1109/tdmr.2008.2002351
复制
发表时间：
2008-10
影响因子：
2
通讯作者：
S. Pae;J. Maiz;Chetan Prasad;Bruce Woolery
中科院分区：
文献类型：
--
作者：
S. Pae;J. Maiz;Chetan Prasad;Bruce Woolery
PMOS晶体管负偏置温度不稳定性（NBTI）对产品性能的影响是一个关键的可靠性问题。随着技术规模和设备尺寸的缩小，在零时间和NBTI老化后的VT变化的趋势增加。的时间0 V T的可变性可以解释的随机性质的掺杂剂，而随机产生的缺陷在栅极氧化层可以占老化引起的设备Δ V T的可变性。本文重点介绍了偏置温度不稳定性，应力引起的器件Δ VT的变化和趋势，在几代技术。老化引起的Δ VT变异性与栅极氧化物面积的显著相关性表明，持续的器件几何尺寸缩放将增加老化引起的变异性。对于第一次，老化引起的Δ VT的变化，其特征在于与高κ栅极电介质，也表现出类似的依赖于栅极氧化物面积制造的晶体管。
The effect of PMOS transistor negative bias temperature instability (NBTI) on product performance is a key reliability concern. As technology scales and device dimensions shrink, the trend in the V T variability at both time zero and after NBTI aging increases. The time0 V T variability can be explained by the random nature of dopants, whereas the randomly generated defects in the gate oxide can account for the aging-induced device DeltaV T variability. This paper focuses on the bias temperature instability stress-induced device DeltaV T variability and the trend across several technology generations. The remarkable correlation of aging-induced DeltaV T variability to the gate oxide area suggests that the continued device geometry scaling will increase the aging-induced variability. For the first time, aging-induced DeltaV T variability was characterized on transistors fabricated with high-kappa gate dielectric that also showed similar dependence to the gate oxide area.