Reducing Energy Consumption of Wakeup Logic through Double-Stage Tag Comparison
Reducing Energy Consumption of Wakeup Logic through Double-Stage Tag Comparison
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DOI：
10.1587/transinf.2021edp7174
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发表时间：
2022-02
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影响因子：
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通讯作者：
Yasutaka Matsuda;Ryota Shioya;H. Ando
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文献类型：
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作者：
Yasutaka Matsuda;Ryota Shioya;H. Ando
当前处理器的高能耗导致若干问题，包括有限的时钟频率、短的电池寿命和降低的设备可靠性。因此，降低处理器的能量消耗是重要的。在处理器中的资源中，发出队列（IQ）是能量的大消耗者，其中大部分由唤醒逻辑消耗。在唤醒逻辑中，检查源操作数就绪性的标记比较消耗大量能量。本文提出了一种用于标签比较的能量降低方案，称为双级标签比较。该方案首先比较标签的低位，然后，只有当这些匹配时，才比较高位。因为标签比较的能量消耗大致与所比较的比特的总数成比例，所以通过减少该数目来节省能量。然而，这种顺序比较增加了IQ的延迟，从而增加了时钟周期时间。虽然这可以通过为issue操作分配额外的周期来避免，但这反过来会降低IPC的性能。为了避免IPC降级，我们将IQ中的少量条目重新配置到单个阶段进行标记比较，其中几个最旧的指令可能会对性能产生不利影响。我们对SPEC2017基准程序的评估结果表明，双级标签比较平均可将唤醒逻辑消耗的能量减少21%（包括开销时为15%），而性能仅下降3.0%。
SUMMARY The high energy consumption of current processors causes several problems, including a limited clock frequency, short battery life-time, and reduced device reliability. It is therefore important to reduce the energy consumption of the processor. Among resources in a processor, the issue queue (IQ) is a large consumer of energy, much of which is consumed by the wakeup logic. Within the wakeup logic, the tag comparison that checks source operand readiness consumes a significant amount of energy. This paper proposes an energy reduction scheme for tag comparison, called double-stage tag comparison. This scheme first compares the lower bits of the tag and then, only if these match, compares the higher bits. Because the energy consumption of tag comparison is roughly proportional to the total number of bits compared, energy is saved by reducing this number. However, this sequential comparison increases the delay of the IQ, thereby increasing the clock cycle time. Although this can be avoided by allocating an extra cycle to the issue operation, this in turn degrades the IPC. To avoid IPC degradation, we reconfigure a small number of entries in the IQ, where several oldest instructions that are likely to have an adverse e ff ect on performance reside, to a single stage for tag comparison. Our evaluation results for SPEC2017 benchmark programs show that the double-stage tag comparison achieves on average a 21% reduction in the energy consumed by the wakeup logic (15% when including the overhead) with only 3.0% performance degradation.