Chip level characterisation studies of Ni and NiFe electrochemical deposition using test structures
Chip level characterisation studies of Ni and NiFe electrochemical deposition using test structures
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使用测试结构对 Ni 和 NiFe 电化学沉积进行芯片级表征研究
DOI：
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发表时间：
2016
期刊：
影响因子：
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通讯作者：
A. J. Walton
中科院分区：
文献类型：
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作者：
J. Murray;Richard Perry;J. Terry;Stewart Smith;Andrew R. Mount;A. J. Walton
本文描述了首次使用测试结构芯片来表征电镀沉积的Ni和NiFe合金薄膜的基本性能。用这种方法进行了芯片级的研究，研究了电解液成分对沉积的Ni和NiFe层性能的影响。这种方法的优点是，每次更换电解液都不需要更换35升的浴缸(这对于晶片水平的研究是必要的)，从而使每次实验的耗时少得多，执行成本也低得多。
This paper describes the first use of test structure chips designed to characterise the fundamental properties of Ni and NiFe alloy films deposited using electroplating. This approach is used to perform a chip-level investigation into the effects of electrolyte bath composition on the characteristics of deposited Ni and NiFe layers. The advantage of this methodology is that each electrolyte change does not require the replacement of a 35 litre bath (which is necessary for wafer level investigations), thereby making each experiment far less time consuming, and considerably cheaper to perform.