Test compaction for small-delay defects using an effective path selection scheme
Test compaction for small-delay defects using an effective path selection scheme
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DOI：
10.1145/2491477.2491488
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发表时间：
2013-07
期刊：
影响因子：
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通讯作者：
D. Xiang;Jianbo Li;K. Chakrabarty;Xijiang Lin
中科院分区：
文献类型：
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作者：
D. Xiang;Jianbo Li;K. Chakrabarty;Xijiang Lin
小延迟缺陷 (SDD) 测试需要故障效应沿着最长的可测试路径传播。然而，识别最长的可测试路径需要大量的 CPU 时间，并且所有此类路径的敏感化会导致大量的模式计数。因此，需要针对小延迟缺陷进行动态测试压缩，以减少测试数据量。我们提出了一种新技术，用于识别通过每个门的最长可测试路径，以加速 SDD 的测试生成。由此产生的测试模式会敏感通过每个 SDD 站点的最长可测试路径。提出了一种基于结构分析的高效动态测试压缩方法，以大幅减少模式计数，同时确保每个 SDD 的所有最长路径都敏感。一组ISCAS 89和IWLS 05基准电路的仿真结果证明了该方法的有效性。
Testing for small-delay defects (SDDs) requires fault-effect propagation along the longest testable paths. However, identification of the longest testable paths requires high CPU time, and the sensitization of all such paths leads to large pattern counts. Dynamic test compaction for small-delay defects is therefore necessary to reduce test-data volume. We present a new technique for identifying the longest testable paths through each gate in order to accelerate test generation for SDDs. The resulting test patterns sensitize the longest testable paths that pass through each SDD site. An efficient dynamic test compaction method based on structural analysis is presented to reduce the pattern count substantially, while ensuring that all the longest paths for each SDD are sensitized. Simulation results for a set of ISCAS 89 and IWLS 05 benchmark circuits demonstrate the effectiveness of this method.