RF CMOS fully-integrated heterodyne front-end receivers design technique for 5 GHz applications

RF CMOS fully-integrated heterodyne front-end receivers design technique for 5 GHz applications
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DOI:
10.1109/iscas.2004.1328356
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发表时间:
2004-05
期刊:
2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)
影响因子:
--
通讯作者:
R. A. Baki;M. El-Gamal
R. A. Baki;M. El-Gamal
中科院分区:
其他
文献类型:
--
作者:
R. A. Baki;M. El-Gamal

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本文提出了一种允许实现完全集成的外差 5GHz RF 接收器的架构。前端电路由低噪声放大器、两个陷波滤波器的关键级联、有源混频器和压控振荡器组成。陷波滤波器采用片上电感器 Q 因子增强技术,旨在提供较宽的镜像抑制 (IR) 带宽,从而无需精确的 IR 调谐电路。对于以 7.2GHz 为中心的 400MHz 带宽,采用标准 0.18/spl mu/m CMOS 技术可以获得超过 40dB 的镜像抑制,而无需借助自动调谐电路的开销和复杂性。接收并讨论了零差和外差5GHz前端接收机的设计问题。
This paper presents an architecture that allows the implementation of fully integrated heterodyne 5GHz RF receivers. The front-end circuitry consists of a low noise amplifier, a critical cascade of two notch filters, an active mixer, and a voltage controlled oscillator. The notch filters, which use on chip inductor Q-factor enhancement techniques, are designed to provide a wide bandwidth of image rejection (IR), eliminating the need for accurate IR tuning circuitry. More than 40dB of image rejection can be obtained in a standard 0.18/spl mu/m CMOS technology, for a 400MHz bandwidth centered at 7.2GHz, without having to resort to the overhead and the complexity of automatic tuning circuits. Design issues of homodyne and heterodyne 5GHz front-end receivers are received and discussed.