3D GaN nanoarchitecture for field-effect transistors
3D GaN nanoarchitecture for field-effect transistors
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DOI：
10.1016/j.mne.2019.04.001
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发表时间：
2019-05-01
影响因子：
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通讯作者：
Wasisto, Hutomo Suryo
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文献类型：
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作者：
Fatahilah, Muhammad Fahlesa;Strempel, Klaas;Wasisto, Hutomo Suryo
三维GaN场效应管(FET)的三维特性为它们提供了与平面器件相比的独特优势，为超越摩尔定律的未来FET开辟了一条很有前途的道路。与当今的硅处理器技术类似，3D GaN FET提供多栅极结构，对沟道提供出色的静电控制，并实现接近理论极限的非常低的亚阈值摆动值。各种概念已经被证明，包括具有GaN纳米线(NW)或纳米鳍(NF)几何形状的横向和垂直器件。横向接触的NW以自下而上的方法生长并转移到绝缘衬底上，实现了出色的传输性能。对于更高功率的应用，基于规则的GaN纳米结构阵列的垂直FET因其并行集成能力和可用作沟道区的较大侧壁表面而特别有前景。本文综述了三维GaN场效应管的研究现状，并对其概念、制作工艺和性能进行了讨论。除了潜在的好处外，还讨论了在复杂的3D处理中可能出现的可靠性问题和困难，这些问题需要解决，以便为未来的切换应用铺平道路。
The three-dimensionality of 3D GaN field-effect transistors (FETs) provides them with unique advantages compared to their planar counterparts, introducing a promising path towards future FETs beyond Moore's law. Similar to today's Si processor technology, 3D GaN FETs offer multi-gate structures that provide excellent electrostatic control over the channel and enable very low subthreshold swing values close to the theoretical limit. Various concepts have been demonstrated, including both lateral and vertical devices with GaN nanowire (NW) or nanofin (NF) geometries. Outstanding transport properties were achieved with laterally contacted NWs that were grown in a bottom-up approach and transferred onto an insulating substrate. For higher power application, vertical FETs based on regular arrays of GaN nanostructures are particularly promising due to their parallel integration capability and large sidewall surfaces, which can be utilized as channel area. In this paper, we review the current status of 3D GaN FETs and discuss their concepts, fabrication techniques, and performances. In addition to the potential benefits, reliability issues and difficulties that may arise in complex 3D processing are discussed, which need to be tackled to pave the way for future switching applications.