Structure of the wafer fused InP (001)-GaAs (001) interface
Structure of the wafer fused InP (001)-GaAs (001) interface
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晶圆熔融 InP (001)-GaAs (001) 界面的结构
DOI：
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发表时间：
1997
期刊：
影响因子：
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通讯作者：
J. Bentell
中科院分区：
文献类型：
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作者：
L. Sagalowicz;A. Rudra;A. Syrbu;J. Behrend;F. Salomonsson;K. Streubel;M. Hammar;J. Bentell
本文研究了晶片熔融InP-GaAs界面的结构。首先，使用几何方法给出了位错网络的几何形状，该位错网络可容纳扭曲和晶格失配。横截面透射电子显微镜和平面图观察。观察到两种不同的失配情况。(1)当不存在扭曲时，3.7%的晶格失配由具有纯边缘特征的位错的规则正方形网络松弛。(2)当存在额外的扭曲时，也会产生位错的正方形网络，但这里的位错具有混合特征;也观察到60 °位错，一些形成闭合缺陷电路，另一些很可能容纳小的倾斜。详细解释了60 °位错与刃型位错之间的相互作用。还观察到空隙或夹杂物以及可能容纳部分热失配的额外位错。
A structural study of wafer fused InP-GaAs interfaces has been carried out. The geometry of the dislocation network which accommodates the twist and the lattice mismatch is first given using a geometrical approach. Cross-sectional transmission electron microscopy and plan view observations are presented. Two different misfit cases are observed. (1) When no twist is present, the 3.7% lattice mismatch is relaxed by a regular square network of dislocations with pure edge character. (2) When an additional twist is present, a square network of dislocations results as well but here the dislocations have a mixed character; 60o dislocations are also observed, some form closed defect circuits and others very likely accommodate a small tilt. The interaction between the 60o dislocations and the edge dislocations is explained in detail. Voids or inclusions are also observed as well as additional dislocations which may accommodate part of the thermal mismatch.