A 95mW MPEG2 MP@HL motion estimation processor core for portable high resolution video application

A 95mW MPEG2 MP@HL motion estimation processor core for portable high resolution video application
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适用于便携式高分辨率视频应用的 95mW MPEG2 MP@HL 运动估计处理器内核

DOI:
10.1093/ietfec/e88-a.12.3492
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发表时间:
2005
期刊:
Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005.
影响因子:
--
通讯作者:
M. Yoshimoto
M. Yoshimoto
中科院分区:
--
文献类型:
--
作者:
Y. Murachi;Koji Hamano;T. Matsuno;J. Miyakoshi;M. Miyama;M. Yoshimoto

文献摘要

被引文献

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本文介绍了一个95 mW的MPEG 2 MP@HL运动估计处理器的核心,便携式和高分辨率的视频应用,如高清摄像机。它具有一种新的分层算法和低功耗环形连接脉动阵列架构。它支持帧/场和双向预测,半像素精度,1920/spl次/1080@30fps分辨率视频。搜索范围是/spl plusmn/128/spl乘以//spl plusmn/64。ME内核采用0.18微米工艺,在3.1mm/spl times/3.1mm内集成了2.25 M晶体管。
This paper describes a 95mW MPEG2 MP@HL motion estimation processor core for portable and high resolution video application like an HD camcorder. It features a novel hierarchical algorithm and a low power ring-connected systolic array architecture. It supports the frame/field and bi-directional prediction with half-pel precision for 1920/spl times/1080@30fps resolution video. The search range is /spl plusmn/128/spl times//spl plusmn/64. The ME core integrates 2.25M transistors in 3.1mm/spl times/3.1mm using 0.18micron technology.