On the Implementation of Parallel Shortest Path Algorithms on a Supercomputer
On the Implementation of Parallel Shortest Path Algorithms on a Supercomputer
复制标题
并行最短路径算法在超级计算机上的实现
DOI:
10.1007/11946441_40
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发表时间:
2006
期刊:
影响因子:
--
通讯作者:
C. Zaroliagis
中科院分区:
文献类型:
--
作者:
G. Stefano;A. Petricola;C. Zaroliagis
We investigate the practical merits of a parallel priority queue through its use in the development of a fast and work-efficient parallel shortest path algorithm, originally designed for an EREW PRAM. Our study reveals that an efficient implementation on a real supercomputer requires considerable effort to reduce the communication performance (which in theory is assumed to take constant time). It turns out that the most crucial part of the implementation is the mapping of the logical processors to the physical processing nodes of the supercomputer. We achieve the requested efficient mapping through a new graph-theoretic result of independent interest: computing a Hamiltonian cycle on a directed hyper-torus. No such algorithm was known before for the case of directed hypertori. Our Hamiltonian cycle algorithm allows us to considerably improve the communication cost and thus the overall performance of our implementation.