A space-efficient flash translation layer for CompactFlash systems
A space-efficient flash translation layer for CompactFlash systems
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DOI：
10.1109/tce.2002.1010143
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发表时间：
2002-05
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影响因子：
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通讯作者：
Jesung Kim;Jong Min Kim;S. Noh;S. Min;Yookun Cho
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文献类型：
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作者：
Jesung Kim;Jong Min Kim;S. Noh;S. Min;Yookun Cho
由于其低功耗和抗冲击性，闪存作为移动消费电子产品的非易失性存储变得越来越重要。然而，它带来了技术挑战，因为写入之前应该进行擦除操作，并且该擦除操作只能在比写入单元大得多的单元中执行。为了解决这些技术障碍，通常采用称为闪存转换层（FTL）的中间软件层将逻辑地址从主机系统重定向到闪存中的物理地址。先前的方法已在写入单元（页）或擦除单元（块）的粒度上执行此地址转换。我们提出了一种新颖的 FTL 设计，它将地址转换中的两种不同粒度结合起来。其动机是粗粒度地址转换降低了维护转换信息所需的资源，这对于移动消费产品来说至关重要，因为成本和功耗原因，而细粒度地址转换在处理小尺寸写入方面非常有效。基于轨迹驱动仿真的性能评估表明，所提出的方案明显优于先前提出的方法。
Flash memory is becoming increasingly important as nonvolatile storage for mobile consumer electronics due to its low power consumption and shock resistance. However, it imposes technical challenges in that a write should be preceded by an erase operation, and that this erase operation can be performed only in a unit much larger than the write unit. To address these technical hurdles, an intermediate software layer called a flash translation layer (FTL) is generally employed to redirect logical addresses from the host system to physical addresses in flash memory. Previous approaches have performed this address translation at the granularity of either a write unit (page) or an erase unit (block). We propose a novel FTL design that combines the two different granularities in address translation. This is motivated by the idea that coarse grain address translation lowers the resources required to maintain translation information, which is crucial in mobile consumer products for cost and power consumption reasons, while fine grain address translation is efficient in handling small size writes. Performance evaluation based on trace-driven simulation shows that the proposed scheme significantly outperforms previously proposed approaches.