Design and validation of a high-voltage levitation circuit for electrostatic accelerometers
Design and validation of a high-voltage levitation circuit for electrostatic accelerometers
复制标题
静电加速度计高压悬浮电路的设计和验证
DOI：
10.1063/1.4833398
复制
发表时间：
2013-12-01
影响因子：
1.6
通讯作者：
Luo, J.
中科院分区：
文献类型：
--
作者：
Li, G.;Wu, S. C.;Luo, J.
利用运算放大器和MOSFET组合，实现了电压范围为0 ~ 900 V、开环带宽为11 kHz的简单高压电路。该电路用于悬浮71 g的测试质量，悬浮在顶部电极下方，间隙距离为57 μ m，因此可以在地面上测试静电加速度计的性能。受地震噪声限制，加速度计的平移噪声在0.1 Hz时约为4 x 10（-8）m/s（2）/Hz（1/2），而高压耦合噪声低一个数量级。(C)2013 AIP Publishing LLC.
A simple high-voltage circuit with a voltage range of 0 to 900 V and an open-loop bandwidth of 11 kHz is realized by using an operational amplifier and a MOSFET combination. The circuit is used for the levitation of a test mass of 71 g, suspended below the top-electrodes with a gap distance of 57 mu m, so that the performance of an electrostatic accelerometer can be tested on the ground. The translation noise of the accelerometer, limited by seismic noise, is about 4 x 10(-8) m/s(2)/Hz(1/2) at 0.1 Hz, while the high-voltage coupling noise is one-order of magnitude lower. (C) 2013 AIP Publishing LLC.