Number Formats, Error Mitigation, and Scope for 16-Bit Arithmetics in Weather and Climate Modeling Analyzed With a Shallow Water Model.
Number Formats, Error Mitigation, and Scope for 16-Bit Arithmetics in Weather and Climate Modeling Analyzed With a Shallow Water Model.
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DOI:
10.1029/2020ms002246
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发表时间:
2020-10
影响因子:
6.8
通讯作者:
Palmer TN
中科院分区:
文献类型:
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作者:
Klöwer M;Düben PD;Palmer TN
The need for high‐precision calculations with 64‐bit or 32‐bit floating‐point arithmetic for weather and climate models is questioned. Lower‐precision numbers can accelerate simulations and are increasingly supported by modern computing hardware. This paper investigates the potential of 16‐bit arithmetic when applied within a shallow water model that serves as a medium complexity weather or climate application. There are several 16‐bit number formats that can potentially be used (IEEE half precision, BFloat16, posits, integer, and fixed‐point). It is evident that a simple change to 16‐bit arithmetic will not be possible for complex weather and climate applications as it will degrade model results by intolerable rounding errors that cause a stalling of model dynamics or model instabilities. However, if the posit number format is used as an alternative to the standard floating‐point numbers, the model degradation can be significantly reduced. Furthermore, mitigation methods, such as rescaling, reordering, and mixed precision, are available to make model simulations resilient against a precision reduction. If mitigation methods are applied, 16‐bit floating‐point arithmetic can be used successfully within the shallow water model. The results show the potential of 16‐bit formats for at least parts of complex weather and climate models where rounding errors would be entirely masked by initial condition, model, or discretization error. Posit numbers reduce rounding errors compared to floating‐point numbers, enabling reliable shallow water simulations with 16‐bit arithmetic Errors caused by 16‐bit arithmetic are reduced with critical computations in 32 bit, which can be implemented on present‐day hardware 16‐ or even 8‐bit communication between processors introduces negligible errors, providing a perspective for reduced data communication