Piezoresistive stress sensor for inline monitoring during assembly and packaging of QFN
Piezoresistive stress sensor for inline monitoring during assembly and packaging of QFN
复制标题
用于 QFN 组装和封装过程中在线监控的压阻式应力传感器
DOI：
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发表时间：
2013
期刊：
影响因子：
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通讯作者：
K. Lang
中科院分区：
文献类型：
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作者：
T. Schreier;G. Chmiel;F. Ansorge;K. Lang
本文介绍了应力测量引线框架的QFN组件由于制造和组装过程中，其特点是取代应力测量芯片。这些结果是基于一种方法来确定电子元件内的应力，通过使用片上CMOS应力测量技术，在BMBF资助的项目iForceSens实现。已对所有相关生产步骤进行了研究。四种不同的芯片和封装尺寸进行了研究。典型的应力状态将与翘曲和分层分析进行比较。应力传感器是基于一个CMOS芯片。虽然它被细分为60个测量单元（300 μm网格），但传感器只需要四个电气连接。这种对准允许确定整个硅芯片表面上的应力分布。我们能够测量切屑表面面内的剪切应力和两个主应力，分辨率<10 MPa。随后可以在16 ms时间步长内询问测量单元的应力值。我们通过替换原有的电子芯片并调查所有与生产相关的作用于基于引线框的QFN产品的负载，充分发挥了该应力测量芯片的主要潜力。利用应力测量芯片，我们研究了晶圆减薄以及典型的封装工艺，如传递模塑。QFN器件在印刷电路板上焊接过程中的应力测量将视野扩展到消费产品。我们调查了应用驱动的问题，如QFN封装的厚度，以及QFN或芯片尺寸是否决定了元件内部的应力。
This paper presents stress measurements in leadframe based QFN components due to fabrication and assembly processes, characterized by substitution with stress measurement chips. The results are based on a method to determine stresses within electronic components by use of on-chip CMOS stress measurement technology, realized during the BMBF funded project iForceSens. All relevant production steps have been investigated. Four different chip and package sizes have been studied. Typical stress states will be compared with warpage and delamination analysis. The stress sensor is based on a CMOS chip. Although it is subdivided into 60 measurement cells (300 μm grid) the sensor needs only four electrical connections. This alignment allows the determination of the stress distribution on the surface of the whole silicon chip. We are able to measure the shear and both main stresses in-plane of the chip surface with a resolution of <; 10 MPa. The stress value of the measurement cell can be interrogated subsequently within 16 ms time steps. We used the main potential of this stress measurement chip by replacing the original electronic chip and investigating all production related loads acting on leadframe based QFN products. With the stress measurement chip we investigated wafer thinning as well as typical packaging processes like transfer molding. The measurement of stresses during soldering of QFN parts on printed circuit boards stretches the view towards the consumer product. We investigated application driven questions like the thickness of QFN packages and whether the QFN or chip size determines stresses inside the component.