Neural Network Overlay Using FPGA DSP Blocks
Neural Network Overlay Using FPGA DSP Blocks
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DOI：
10.1109/fpl.2019.00048
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发表时间：
2019-09
期刊：
影响因子：
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通讯作者：
Lenos Ioannou;Suhaib A. Fahmy
中科院分区：
文献类型：
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作者：
Lenos Ioannou;Suhaib A. Fahmy
随着神经网络的应用越来越广泛，加速这类计算已经成为人们关注的焦点。更大、更复杂的网络正在各种领域中提出，需要更强大的计算平台。神经网络结构固有的并行性和规则性意味着可以采用自定义架构来实现这一目的。FPGA由于其灵活性、可实现的性能、效率和丰富的外围设备而被广泛用于实现这样的加速器。虽然使用多核CPU和GPU的平台也具有竞争力，但FPGA提供了上级能效和更广泛的优化空间，以提高性能和效率。FPGA也更适合在边缘执行此类计算，其中多核CPU和GPU不太可能被使用，并且能源效率至关重要。
With the increasing wider application of neural networks, there has been significant focus on accelerating this class of computations. Larger, more complex networks are being proposed in a variety of domains, requiring more powerful computation platforms. The inherent parallelism and regularity of neural network structures means custom architectures can be adopted for this purpose. FPGAs have been widely used to implement such accelerators because of their flexibility, achievable performance, efficiency, and abundant peripherals. While platforms that utilize multicore CPUs and GPUs are also competitive, FPGAs offer superior energy efficiency, and a wider space of optimisations to enhance performance and efficiency. FPGAs are also more suitable for performing such computations at the edge, where multicore CPUs and GPUs are are less likely to be used and energy efficiency is paramount.