Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability Analysis
Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability Analysis
复制标题
利用满意度分析的线程并行集成测试模式生成器
DOI：
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复制
发表时间：
2009
期刊：
影响因子：
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通讯作者：
B. Becker
中科院分区：
文献类型：
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作者：
A. Czutro;I. Polian;Matthew D. T. Lewis;P. Engelke;S. Reddy;B. Becker
有效利用多核架构固有的并行性是电子设计自动化（EDA）领域的一个重大挑战。一种计算成本较高的EDA算法是自动测试模式生成（ATPG）。提出了一种基于线程并行SAT求解器的ATPG工具TIGUAN。由于SAT引擎与ATPG算法的紧密集成以及各种优化技术的精心选择，数百万门工业电路的处理没有中断。TIGUAN既支持常规的单卡滞故障，也支持复杂的条件多重卡滞故障，从而可以生成非标准故障模型的模式。我们展示了TIGUAN如何与传统的结构ATPG相结合，以充分利用两种方法的内在优势。
Efficient utilization of the inherent parallelism of multi-core architectures is a grand challenge in the field of electronic design automation (EDA). One EDA algorithm associated with a high computational cost is automatic test pattern generation (ATPG). We present the ATPG tool TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully chosen mix of various optimization techniques, multi-million-gate industrial circuits are handled without aborts. TIGUAN supports both conventional single-stuck-at faults and sophisticated conditional multiple stuck-at faults which allows to generate patterns for non-standard fault models. We demonstrate how TIGUAN can be combined with conventional structural ATPG to extract full benefit of the intrinsic strengths of both approaches.