Collective computational activity in self-assembled arrays of quantum dots: a novel neuromorphic architecture for nanoelectronics
Collective computational activity in self-assembled arrays of quantum dots: a novel neuromorphic architecture for nanoelectronics
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自组装量子点阵列中的集体计算活动：纳米电子学的新型神经形态架构
DOI：
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发表时间：
1996
期刊：
影响因子：
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通讯作者：
Xiaodong Wang
中科院分区：
文献类型：
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作者：
V. Roychowdhury;D. Janes;Supriyo Bandyopadhyay;Xiaodong Wang
我们描述了一类新的纳米电子电路，它利用在共振隧穿二极管上自组装的纳米尺寸金属岛（量子点）的电阻/电容连接阵列中的充电行为来进行神经形态计算。这些电路产生联想记忆效应，并实现神经网络的加性短期记忆（STM）或内容可寻址记忆（CAM）模型，而无需大面积/高功率运算放大器，也无需器件之间大量的互连。这两个要求在过去严重阻碍了神经网络的应用。此外，与大多数量子器件不同，这些电路可以利用单电子电荷动力学解决NP完全优化问题（如旅行商问题），表现出基本的图像处理能力，并在室温下工作。具有100×100像素容量的二维（2D）处理器可以在10⁻⁸平方厘米的面积内制造，从而实现前所未有的功能密度。还讨论了利用自组装合成这些电路的可能途径。
We describe a new class of nanoelectronic circuits which exploits the charging behavior in resistively/capacitively linked arrays of nanometer-sized metallic islands (quantum dots), self-assembled on a resonant tunneling diode, to perform neuromorphic computation. These circuits produce associative memory effects and realize the additive short-term memory (STM) or content addressable memory (CAM) models of neural networks without requiring either large-area/high-power operational amplifiers, or massive interconnectivity between devices. Both these requirements had seriously hindered the application of neural networks in the past. Additionally, the circuits can solve NP-complete optimization problems (such as the traveling salesman problem) using single electron charge dynamics, exhibit rudimentary image-processing capability, and operate at room temperature unlike most quantum devices. Two-dimensional (2D) processors, with a 100/spl times/100 pixel capacity, can be fabricated in an area of 10/sup -8/ cm/sup 2/ leading to unprecedented functional density. Possible routes to synthesizing these circuits, employing self-assembly, are also discussed.