Investigation of Surface- and Buffer-Induced Current Collapse in GaN High-Electron Mobility Transistors Using a Soft Switched Pulsed I-V Measurement
Investigation of Surface- and Buffer-Induced Current Collapse in GaN High-Electron Mobility Transistors Using a Soft Switched Pulsed I-V Measurement
复制标题
使用软开关脉冲 I-V 测量研究 GaN 高电子迁移率晶体管中的表面和缓冲器感应电流崩塌
DOI：
10.1109/led.2014.2356720
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发表时间：
2014-11-01
影响因子：
4.9
通讯作者：
Shen, Bo
中科院分区：
文献类型：
--
作者：
Wang, Maojun;Yan, Dawei;Shen, Bo
在这篇文章中，我们使用软开关脉冲I-V测量不同静态偏置点，研究了AlGaN/GaN高电子迁移率晶体管（HEMTs）中表面和缓冲诱导电流崩溃的行为。发现在静态偏置应力下，与表面和缓冲相关的电流崩溃与栅极和漏极偏置（V-GS0, V-DS0）有不同的关系。在未钝化的器件中，表面感应电流塌陷随着负V-GS0单调增加，表明栅极泄漏向表面注入电子是主要机制，而Si3N4钝化可以有效消除这种电流塌陷。在有意掺杂碳缓冲层的器件中，表面钝化后的缓冲诱导电流坍塌与V-GS0表现出不同的关系。缓冲器相关的电流崩塌在V-GS0中呈现钟形行为，表明缓冲器中的热电子捕获是主要机制。软开关脉冲I-V测量提供了一种有效的方法来区分iii族氮化hemt中与表面和缓冲相关的电流崩溃。
In this letter, we investigated the behaviors of surface-and buffer-induced current collapse in AlGaN/GaN high-electron mobility transistors (HEMTs) using a soft-switched pulsed I-V measurement with different quiescent bias points. It is found that the surface-and buffer-related current collapse have different relationship with the gate and drain biases (V-GS0, V-DS0) during quiescent bias stress. The surface-induced current collapse in devices without passivation monotonically increases with the negative V-GS0, suggesting that an electron injection to the surface from gate leakage is the dominant mechanism and the Si3N4 passivation could effectively eliminate such current collapse. The buffer-induced current collapse in devices with intentionally carbon-doped buffer layer exhibits a different relationship with V-GS0 after surface passivation. The buffer-related current collapse shows a bell-shaped behavior with V-GS0, suggesting that a hot electron trapping in the buffer is the dominant mechanism. The soft-switched pulsed I-V measurement provides an effective method to distinguish between the surface-and buffer-related current collapse in group III-nitride HEMTs.