A Dual-Path 4-Phase Nonuniform Wideband Receiver With Digital MMSE Harmonic Rejection Equalizer
A Dual-Path 4-Phase Nonuniform Wideband Receiver With Digital MMSE Harmonic Rejection Equalizer
复制标题
具有数字 MMSE 谐波抑制均衡器的双路 4 相非均匀宽带接收器
DOI：
10.1109/tmtt.2017.2647949
复制
发表时间：
2017
影响因子：
4.3
通讯作者：
W. Namgoong
中科院分区：
文献类型：
--
作者：
Esmail Babakrpur;W. Namgoong
本文提出了一种双路径非均匀阻塞容忍宽带接收器，它采用数字谐波抑制来抑制本振 (LO) 谐波干扰。所提出的接收器仅使用四个均匀间隔的时钟（每个时钟具有 25% 占空比）来执行任何 LO 谐波（包括七次和九次谐波）的谐波抑制。开发了一种自适应最小均方误差 (MMSE) 谐波抑制均衡器，在存在谐波干扰和两条路径之间存在相关噪声的情况下，可最大限度地减少均方误差意义上的所需信号失真。该芯片原型采用 130 nm CMOS 工艺制造，对于高达测量的 11 次谐波的 LO 谐波干扰，谐波抑制比 (HRR) >75 dB。对于所建议的接收机，测量了 1 GHz 频率下的 3.1 dB 噪声系数 (NF)、在 1 GHz 偏移 80 MHz 下的带外三阶互调截取点 (OBIIP3) 为 14.5 dBm 以及在 100–1450 MHz 频率范围内高于 10 dB 的回波损耗。
This paper presents a dual-path nonuniform blocker tolerant wideband receiver that employs digital harmonic rejection to suppress local oscillator (LO) harmonic interferers. The proposed receiver performs harmonic rejection of any LO harmonic including seventh and ninth using only four uniformly spaced clocks each with 25% duty cycle. An adaptive minimum mean-squared error (MMSE) harmonic rejection equalizer is developed that minimizes the desired signal distortion in the mean-squared error sense in the presence of harmonic interferers and the correlated noise between the two paths. The chip prototype is fabricated in 130 nm CMOS process and achieved harmonic rejection ratio (HRR) >75 dB for LO harmonic interferers up to the measured 11th harmonic. The 3.1 dB noise figure (NF) at 1 GHz frequency, 14.5 dBm out-of-band third-order intermodulation intercept point (OBIIP3) at 80 MHz offset from 1 GHz and higher than 10 dB return loss in the frequency range of 100–1450 MHz is measured for the proposed receiver.