Challenges in sleep transistor design and implementation in low-power designs
Challenges in sleep transistor design and implementation in low-power designs
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DOI：
10.1145/1146909.1146943
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发表时间：
2006-07
期刊：
影响因子：
--
通讯作者：
K. Shi;D. Howard
中科院分区：
文献类型：
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作者：
K. Shi;D. Howard
最优的电源门控休眠晶体管设计与实现对于成功的低功耗设计至关重要。本文阐述了休眠晶体管设计与实现的重要考量因素，包括头开关或尾开关的选择、休眠晶体管分布的选择以及休眠晶体管栅极长度、宽度和体偏置在面积、泄漏和效率方面的优化。它还研究了用于休眠晶体管实现的各种上电电流冲击控制方法。
Optimum power gating sleep transistor design and implementation are critical to a successful low-power design. This paper describes important considerations for the sleep transistor design and implementation including header or footer switch selection, sleep transistor distribution choices and sleep transistor gate length, width and body bias optimization for area, leakage and efficiency. It also investigated various power-on current rush control methods for the sleep transistor implementation