Compaction of pass/fail-based diagnostic test vectors for combinational and sequential circuits
Compaction of pass/fail-based diagnostic test vectors for combinational and sequential circuits
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DOI：
10.1145/1118299.1118455
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发表时间：
2006-01
期刊：
影响因子：
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通讯作者：
Y. Higami;K. Saluja;Hiroshi Takahashi;Shin-ya Kobayashi;Y. Takamatsu
中科院分区：
文献类型：
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作者：
Y. Higami;K. Saluja;Hiroshi Takahashi;Shin-ya Kobayashi;Y. Takamatsu
在最近的测试文献中，对故障诊断问题给予了大量的关注。然而，测试向量的压缩用于故障诊断的研究却很少。诊断测试向量的压缩必须考虑到所有需要用给定测试向量集来区分的故障对。显然，故障对的数量远远大于故障的数量，因此使得这个问题非常困难和具有挑战性。本文的主要贡献是：1)使用减少一次要考虑的故障对大小的技术；2)对组合电路使用故障区分表方法的新变体，对顺序电路使用逆序恢复方法；3)引入启发式方法来管理考虑所有故障对的空间复杂性。最后，给出了ISCAS基准电路的实验结果，验证了所提方法的有效性
Substantial attention is being paid to the fault diagnosis problem in recent test literature. Yet, the compaction of test vectors for fault diagnosis is little explored. The compaction of diagnostic test vectors must take care of all fault pairs that need to be distinguished by a given test vector set. Clearly, the number of fault pairs is much larger than the number of faults thus making this problem very difficult and challenging. The key contributions of this paper are: 1) to use techniques for reducing the size of fault pairs to be considered at a time, 2) to use novel variants of the fault distinguishing table method for combinational circuits and reverse order restoration method for sequential circuits, and 3) to introduce heuristics to manage the space complexity of considering all fault pairs for large circuits. Finally, the experimental results for ISCAS benchmark circuits are presented to demonstrate the effectiveness of the proposed methods