Suppression of Drain-Induced Barrier Lowering in Silicon-on-Insulator MOSFETs Through Source/Drain Engineering for Low-Operating-Power System-on-Chip Applications
Suppression of Drain-Induced Barrier Lowering in Silicon-on-Insulator MOSFETs Through Source/Drain Engineering for Low-Operating-Power System-on-Chip Applications
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DOI：
10.1109/ted.2012.2225063
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发表时间：
2013
影响因子：
3.1
通讯作者：
Tatsuya Yamada;Y. Nakajima;T. Hanajiri;Takuo Sugano
中科院分区：
文献类型：
--
作者：
Tatsuya Yamada;Y. Nakajima;T. Hanajiri;Takuo Sugano
在本文中，作者提出了新的金属氧化物半导体场效应晶体管（MOSFET）类型，其特征是在绝缘体上硅（SOI）MOSFET的源极和/或漏极区域中附加L形反掺杂区域，以减少通过掩埋氧化物（BOX）层的漏极诱导势垒降低（DIBL）。漏极区域中的L形区域屏蔽BOX层使其不被漏极电场穿透，从而减少体区域中的DIBL。电特性的模拟表明，这些新的MOSFET的DIBL抑制和亚阈值斜率的短沟道性能比传统的SOI MOSFET。除了这种抑制之外，这些新型MOSFET比传统的SOI MOSFET更有效地抑制击穿电压。作者的结论是，所提出的器件能够有助于超大规模集成电路中SOI MOSFET的缩放。
In this paper, the authors propose novel metal-oxide-semiconductor field-effect transistor (MOSFET) types featuring additional L-shaped counterdoped areas in the source and/or drain regions of silicon-on-insulator (SOI) MOSFETs to reduce drain-induced barrier lowering (DIBL) through the buried oxide (BOX) layer. The L-shaped region in the drain area shields the BOX layer from penetration by the drain electric field, thereby reducing DIBL in the body region. Simulation of the electrical characteristics of these novel MOSFETs demonstrated more remarkable DIBL suppression and subthreshold slope performance in short-channel regions than in conventional SOI MOSFETs. In addition to this suppression, these novel MOSFETs suppress breakdown voltage more effectively than conventional SOI MOSFETs. The authors concluded that the proposed devices are capable of contributing to the scaling of SOI MOSFETs in ultralarge-scale integration circuits.