Exploration of yttria films as gate dielectrics in sub-50 nm carbon nanotube field-effect transistors.
Exploration of yttria films as gate dielectrics in sub-50 nm carbon nanotube field-effect transistors.
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DOI：
10.1039/c4nr03475a
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发表时间：
2014-09
期刊：
影响因子：
6.7
通讯作者：
L. Ding;Zhiyong Zhang;J. Su;Qunqing Li;Lianmao Peng
中科院分区：
文献类型：
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作者：
L. Ding;Zhiyong Zhang;J. Su;Qunqing Li;Lianmao Peng
研究了氧化钇薄膜作为碳纳米管场效应晶体管（CNTFFET）的栅电极，其栅电极长度可缩小到50 nm以下。氧化钇膜提供具有低界面陷阱密度的Ω形栅极电介质，对于长CNTF和短CNTF两者，每十倍频程74 mV的低平均亚阈值摆幅，以及小的漏极引起的势垒降低。它还表明，CNTF晶体管的性能随着温度的降低而增加，在液氮温度下具有每十倍22 mV的优异亚阈值摆幅。提出了一种计算CNTF薄膜界面陷阱密度的方法，测得CNTF薄膜界面陷阱密度为5.2 × 10（6）cm（-1），表明氧化钇薄膜具有较高的电学质量。
Thin yttria films were investigated for use as gate dielectrics in carbon nanotube field-effect transistors (CNTFETs) with the gate length scaled down to sub-50 nm size. The yttria film provided an omega-shaped gate dielectric with a low interface trap density, a low average sub-threshold swing of 74 mV per decade for both long and short CNTFETs, and a small drain-induced barrier lowering. It was also shown that the performance of CNTFETs increases with decreasing temperature, with an excellent sub-threshold swing of 22 mV per decade at liquid nitrogen temperatures. A method was developed to retrieve the interface trap density in CNTFETs and a low interface trap density of 5.2 × 10(6) cm(-1) was achieved, indicating the high electric quality of the yttria films.