Transaction-Based Communication-Centric Debug
Transaction-Based Communication-Centric Debug
复制标题
基于事务的以通信为中心的调试
DOI：
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发表时间：
2007
期刊：
影响因子：
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通讯作者：
M. Bennebroek
中科院分区：
文献类型：
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作者：
K. Goossens;B. Vermeulen;R. .. Steeden;M. Bennebroek
片上系统（SOC）的行为是复杂的，因为它们包含通过并发互连（诸如片上网络（NOC））进行交互的多个处理器。这样的SOCs是很难的。在对调试范围和粒度进行分类的基础上，提出了以通信为中心、基于事务的调试方法。以通信为中心的调试侧重于IP块之间的通信和同步，这是通过使用事务的互连来实现的。我们定义并实现了一个模块化的调试架构，基于NOC，监视器和专用的高速事件分发广播互连。制造测试扫描链和IEEE1149.1测试访问端口（TAP）可重复用于配置和调试数据读出。我们的调试架构只需要对功能架构进行很小的更改。额外的面积成本仅限于监视器和事件分发互连，占NOC面积的4.5%，或不到SOC面积的0.2%。调试架构以NOC功能速度运行，并对调试事件做出非常快速的反应，以及时停止SOC接近引发事件的条件。停止使用TAP后从SOC检索数据的速度为10 MHz。我们证明了我们的概念和架构的门级实现，包括NOC，事件分布互连，时钟，复位和TAP控制器。我们包括门级信号跟踪，说明在消息和事务级别的调试
The behaviour of systems on chip (SOC) is complex because they contain multiple processors that interact through concurrent interconnects, such as networks on chip (NOC). Debugging such SOCs is hard. Based on a classification of debug scope and granularity, we propose that debugging should be communication-centric and based on transactions. Communication-centric debug focuses on the communication and the synchronisation between the IP blocks, which are implemented by the interconnect using transactions. We define and implement a modular debug architecture, based on NOC, monitors, and a dedicated high-speed event-distribution broadcast interconnect. The manufacturing-test scan chains and IEEE1149.1 test access ports (TAP) are re-used for configuration and debug data read-out. Our debug architecture requires only small changes to the functional architecture. The additional area cost is limited to the monitors and the event distribution interconnect, which are 4.5% of the NOC area, or less than 0.2% of the SOC area. The debug architecture runs at NOC functional speed and reacts very quickly to debug events to stop the SOC close in time to the condition that raised the event. The speed at which data is retrieved from the SOC after stopping using the TAP is 10 MHz. We prove our concepts and architecture with a gate-level implementation that includes the NOC, event distribution interconnect, and clock, reset, and TAP controllers. We include gate-level signal traces illustrating debug at message and transaction levels