Scalable precision cache analysis for real-time software
Scalable precision cache analysis for real-time software
复制标题
DOI：
10.1145/1274858.1274863
复制
发表时间：
2007-09
期刊：
影响因子：
--
通讯作者：
J. Staschulat;R. Ernst
中科院分区：
文献类型：
--
作者：
J. Staschulat;R. Ernst
为了提高处理器的性能，需要缓存，但是缓存的时间行为很难预测，特别是在具有抢占式调度的嵌入式系统中。目前的方法使用简化的假设或提出复杂的分析算法来约束与缓存相关的抢占延迟。本文提出了一种可扩展的关联指令缓存抢占延迟分析方法，以控制分析精度和时间复杂度。将精确的抢占延迟计算集成到缓存感知的可调度性分析中。在几个实验中对该框架进行了评估。
Caches are needed to increase the processor performance, but the temporal behavior is difficult to predict, especially in embedded systems with preemptive scheduling. Current approaches use simplified assumptions or propose complex analysis algorithms to bound the cache-related preemption delay. In this paper, a scalable preemption delay analysis for associative instruction caches to control the analysis precision and the time-complexity is proposed. An accurate preemption delay calculation is integrated into a cache-aware schedulability analysis. The framework is evaluated in several experiments.