NBTI mitigation in microprocessor designs

NBTI mitigation in microprocessor designs
复制标题

微处理器设计中的 NBTI 缓解

DOI:
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发表时间:
2012
期刊:
ACM Great Lakes Symposium on VLSI
影响因子:
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通讯作者:
W. Fornaciari
W. Fornaciari
中科院分区:
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文献类型:
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作者:
S. Corbetta;W. Fornaciari

文献摘要

被引文献

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负偏置温度不稳定性严重影响纳米电路的可靠性和性能。持续的应力和不断升高的工作温度会导致设备退化和系统长期不可用。优化压力/恢复阶段的工作周期以减少Vth退化的机会导致了在架构级别上以可靠性为导向的资源分配的创新研究。这项工作探讨了不同的分配策略对处理器退化的影响,通过一种新的估计方法。实验结果表明,在不同的操作场景和过程可变性下,所提出的nbti感知分配策略可以保证比经典策略降低10%到30%的退化。
Negative-Bias Temperature Instability seriously affects nanoscale circuits reliability and performance. Continuous stress and increasing operating temperatures lead to device degradation and long-term system unavailability. The opportunity to optimize the duty-cycle of the stress/recovery phases to reduce Vth degradation leads to innovative research of reliability-oriented resources allocation at architectural level. This work explores the impact of different allocation strategies on the processor degradation, through a novel estimation methodology. Experimental results show that the proposed NBTI-aware allocation strategy can guarantee from 10% and up to 30% lower degradation compared to classical strategies, under different operating scenarios and under process variability.