Measurements and analyses of substrate noise waveform in mixed signal IC environment
Measurements and analyses of substrate noise waveform in mixed signal IC environment
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混合信号 IC 环境中基板噪声波形的测量和分析
DOI：
10.1109/cicc.1999.777347
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发表时间：
1999
期刊：
影响因子：
--
通讯作者：
A. Iwata
中科院分区：
文献类型：
--
作者：
M. Nagata;J. Nagai;T. Morie;A. Iwata
为了对混合信号集成电路环境中的衬底噪声特性进行实验研究，研制了一种基于0.4/SPLµ/m的P衬底N-well工艺的跃迁可控噪声源。可以控制有效逻辑元件的数量、转换方向和延迟。在100ps时间分辨率下测量的衬底噪声波形表明，反映逻辑转换频率的衬底电压峰值具有一个比开关时间大几倍的时间常数。用等效电路分析表明，这一过程是整个逻辑电路的寄生电容与外部电源之间通过电源/回路寄生阻抗进行电荷转移的结果。
A transition controllable noise source is developed in a 0.4 /spl mu/m CMOS, P-substrate N-well technology, for experimental studies on substrate noise properties in a mixed signal IC environment. The number of active logic elements, transition directions, and delays can be controlled. Measured substrate noise waveforms with 100 ps time resolution show that peaks in substrate voltage, reflecting logic transition frequencies, have a time constant a few times larger than the switching time. Analyses with equivalent circuits make it clear that this process results from charge transfer between parasitic capacitance of entire logic circuits and an external supply, through supply/return parasitic impedance.