PC-TRIO: A Power Efficient TCAM Architecture for Packet Classifiers
PC-TRIO: A Power Efficient TCAM Architecture for Packet Classifiers
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DOI:
10.1109/tc.2014.2315645
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发表时间:
2015-04-01
影响因子:
3.7
通讯作者:
Seetharaman, Gunasekaran
中科院分区:
文献类型:
--
作者:
Banerjee, Tania;Sahni, Sartaj;Seetharaman, Gunasekaran
PC-TRIO is an indexed TCAM architecture for packet classification. In addition to index TCAMs, PC-TRIO uses wide SRAM words. On our packet classifier data sets, PC-TRIO reduced TCAM power by 96 percent and lookup time by 98 percent on an average, compared to PC-DUOS+ [28] that does not use indexing or wide SRAMs. PC-DUOS+ was shown to be better than STCAM, which is a single TCAM architecture conventionally used for packet classification [28]. In this paper, we also extend PC-DUOS+ by augmenting it with wide SRAMs and index TCAMs using the same methodology as used in PC-TRIO, to obtain PC-DUOS+W. On ACL data sets, PCDUOS+W reduced TCAM power by 86 percent and lookup time by 98 percent, compared to PC-DUOS+, which demonstrates the effectiveness of indexing and usage of wide SRAMs in reducing power and lookup time for packet classifiers.