Optimizing Sparse Matrix-Vector Multiplications on an ARMv8-based Many-Core Architecture
Optimizing Sparse Matrix-Vector Multiplications on an ARMv8-based Many-Core Architecture
复制标题
在基于 ARMv8 的众核架构上优化稀疏矩阵向量乘法
DOI：
10.1007/s10766-018-00625-8
复制
发表时间：
2019
影响因子：
1.5
通讯作者：
Wang Zheng
中科院分区：
文献类型：
--
作者：
Chen Donglin;Fang Jianbin;Chen Shizhao;Xu Chuanfu;Wang Zheng
稀疏矩阵向量乘法（SpMV）在科学和HPC应用中很常见，但很难优化。虽然基于ARMv 8的处理器IP正在成为传统x64 HPC处理器设计的替代方案，但很少有关于这种新的多核处理器上的SpMV性能的研究。为了设计高效的HPC软件和硬件，我们需要了解SpMV的性能。这项工作开发了一种定量的方法来表征SpMV性能最近的ARMv 8为基础的众核架构，Phytium FT-2000加（FTP）。我们进行了广泛的实验，涉及超过9500个不同的分析运行956稀疏数据集和五种主流稀疏矩阵存储格式，并比较FTP对英特尔骑士登陆众核。我们的实验表明，挑选最佳的稀疏矩阵存储格式和参数是不平凡的，因为正确的决策需要输入矩阵和硬件的专家知识。我们通过提出一个基于机器学习的模型来解决这个问题，该模型使用输入矩阵特征来预测最佳存储格式和参数。该模型自动专门针对我们考虑的众核架构。实验结果表明，我们的方法平均达到93%的最佳可用性能，而不会产生运行时分析开销。
Sparse matrix–vector multiplications (SpMV) are common in scientific and HPC applications but are hard to be optimized. While the ARMv8-based processor IP is emerging as an alternative to the traditionalx64HPC processor design, there is little study on SpMV performance on such new many-cores. To design efficient HPC software and hardware, we need to understand how well SpMV performs. This work develops a quantitative approach to characterize SpMV performance on a recent ARMv8-based many-core architecture,Phytium FT-2000 Plus(FTP). We perform extensive experiments involved over 9500 distinct profiling runs on 956 sparse datasets and five mainstream sparse matrix storage formats, and compare FTP against the Intel Knights Landing many-core. We experimentally show that picking the optimal sparse matrix storage format and parameters is non-trivial as the correct decision requires expert knowledge of the input matrix and the hardware. We address the problem by proposing a machine learning based model that predicts the best storage format and parameters using input matrix features. The model automatically specializes to the many-core architectures we considered. The experimental results show that our approach achieves on average 93% of the best-available performance without incurring runtime profiling overhead.