Performance analysis of system overheads in TCP/IP workloads
Performance analysis of system overheads in TCP/IP workloads
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TCP/IP 工作负载中系统开销的性能分析
DOI：
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发表时间：
2005
期刊：
影响因子：
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通讯作者：
S. Reinhardt
中科院分区：
文献类型：
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作者：
N. Binkert;Lisa R. Hsu;A. Saidi;R. Dreslinski;Andrew L. Schultz;S. Reinhardt
当前的高性能计算机系统不能使最新可用的高带宽网络（例如10千兆位以太网）饱和。实现每秒10千兆比特的一个关键障碍是CPU和网络接口控制器（NIC）之间的通信开销很高，NIC通常驻留在具有高访问延迟的标准I/O总线上。使用几个网络密集型的基准测试，我们调查的影响，这种开销通过分析假设的系统中，NIC更紧密地耦合到CPU的性能，包括集成的CPU芯片。我们发现，具有高延迟的系统在设备驱动程序中花费了大量的时间。NIC集成可以大大减少此开销，在其他CPU处理不成为瓶颈时提供显著的吞吐量优势。NIC集成还支持DMA数据的缓存放置。这个特性在快速访问有效负载时有巨大的好处，但在其他情况下可能会由于缓存污染而损害性能。
Current high-performance computer systems are unable to saturate the latest available high-bandwidth networks such as 10 Gigabit Ethernet. A key obstacle in achieving 10 gigabits per second is the high overhead of communication between the CPU and network interface controller (NIC), which typically resides on a standard I/O bus with high access latency. Using several network-intensive benchmarks, we investigate the impact of this overhead by analyzing the performance of hypothetical systems in which the NIC is more closely coupled to the CPU, including integration on the CPU die. We find that systems with high-latency NICs spend a significant amount of time in the device driver. NIC integration can substantially reduce this overhead, providing significant throughput benefits when other CPU processing is not a bottleneck. NIC integration also enables cache placement of DMA data. This feature has tremendous benefits when pay-loads are touched quickly, but potentially can harm performance in other situations due to cache pollution.