Parallel template matching operations on a dynamically reconfigurable vision-chip architecture

Parallel template matching operations on a dynamically reconfigurable vision-chip architecture
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动态可重构视觉芯片架构上的并行模板匹配操作

DOI:
10.1109/iscit.2010.5665152
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发表时间:
2010
期刊:
2011 IEEE 9th International New Circuits and systems conference
影响因子:
--
通讯作者:
S. Kawahito
S. Kawahito
中科院分区:
--
文献类型:
--
作者:
Hironari Nakada;Minoru Watanabe;S. Kawahito

文献摘要

被引文献

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最近,自动驾驶汽车和机器人需要比人眼识别速度更快的高速图像识别功能。目前,这种嵌入式系统由处理器和存储器组成。为了识别许多图像,必须将许多模板图像存储在内存中,并且必须快速地从内存发送到处理器。例如,假设系统每1ms接收一张100万像素的外部图像,假设系统必须在1ms内执行100万张相同百万像素的模板图像的模板匹配操作,那么从存储器到处理器的传输速度和处理器的操作达到1 Petapixel/s。因此,为了实现高速模板匹配操作,提出了一种具有全息存储和大带宽光连接的动态可重构视觉芯片架构。在这些研究中,本文提出了一种基于动态可重构视觉芯片架构的并行模板匹配算法。在此基础上,结合实例分析了新方法的优越性。
Recently, high-speed image recognition functionality that is superior to the image recognition speed of the human eye is demanded for autonomous vehicles and robots. Currently, such embedded systems comprise a processor and memory. To recognize many images, many template images must be stored in memory and must be sent quickly from memory to the processor. For example, assuming that the system receives an external image with 1 million pixels at every 1 ms and assuming that the system must execute template-matching operations of 1 million template images with the same million pixels within 1 ms, then the transfer speed from the memory to the processor and the processor operation reaches 1 Petapixel/s. Therefore, to realize high-speed template-matching operation, a dynamically reconfigurable vision-chip architecture with a holographic memory and large-bandwidth optical connections has been proposed. Among such researches, this paper presents a proposal of novel parallel template-matching operations performed on the dynamically reconfigurable vision-chip architecture. Furthermore, the advantages of the new method are discussed based on some demonstration results.