Post Quantum ECC on FPGA Platform
Post Quantum ECC on FPGA Platform
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FPGA 平台上的后量子 ECC
DOI：
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发表时间：
2019
期刊：
影响因子：
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通讯作者：
Debdeep Mukhopadhyay
中科院分区：
文献类型：
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作者：
Debapriya Basu Roy;Debdeep Mukhopadhyay
后量子密码学最近受到了极大的关注，这是由于NIST呼吁对量子抵抗公钥算法进行标准化。在这种背景下，超奇异的基于公钥的密钥交换算法（SIKE）已经成为一个潜在的候选人，以取代传统的公钥算法，如RSA和ECC。SIKE提供O（4 <$p）的经典安全性和O（6 <$p）的量子安全性，其中p是底层场的特征。此外，在所有后量子公开算法中，SIKE具有最小的密钥大小，使其非常适合于带宽受限的环境。在本文中，我们提出了一个有效的实现基于FPGA的应用程序的SIKE协议。所提出的架构提供了相同的延迟，最好的现有实现的SIKE协议，而消耗的DSP和58%的块RAM资源减少48%。因此，我们的设计是更有效的，比现有的实现SIKE。
Post-quantum cryptography has gathered significant attention in recent times due to the NIST call for standardization of quantum resistant public key algorithms. In that context, supersingular isogeny based key exchange algorithm (SIKE) has emerged as a potential candidate to replace traditional public key algorithms like RSA and ECC. SIKE provides O( 4 √p) classical security and O( 6 √p) quantum security where p is the characteristic of the underlying field. Additionally, SIKE has the smallest key sizes among all the post-quantum public algorithm, making it very suitable for bandwidth constrained environment. In this paper, we present an efficient implementation of SIKE protocol for FPGA based applications. The proposed architecture provides the same latency as that of the best existing implementation of SIKE protocol while consuming 48% less DSPs and 58% less block RAM resources. Thus, our design is substantially more efficient compared to that of existing implementations of SIKE.