A Reconfigurable Transient Optimizer Applied to a Four-Phase Buck Converter for Optimizing Both DVS and Load Transient Responses
A Reconfigurable Transient Optimizer Applied to a Four-Phase Buck Converter for Optimizing Both DVS and Load Transient Responses
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应用于四相降压转换器的可重构瞬态优化器,用于优化 DVS 和负载瞬态响应
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发表时间:
2020
期刊:
影响因子:
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通讯作者:
T. Kuo
中科院分区:
文献类型:
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作者:
Pai;Yi;T. Kuo
This brief presents a reconfigurable transient optimizer (RTO) applied to a four-phase buck converter for optimizing both dynamic-voltage-scaling (DVS) and load transient responses to approach the theoretically minimum output-voltage undershoot <inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{US}}$ </tex-math></inline-formula>, overshoot <inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{OS}}$ </tex-math></inline-formula>, and settling time <inline-formula> <tex-math notation="LaTeX">$\text{t}_{\mathrm{S}}$ </tex-math></inline-formula>. The DVS and load transients are instantly detected by a voltage sensor and calibrated capacitor-current sensor, respectively. When a large DVS or load transient occurs, the RTO enables all four phases, reconfigures its circuit architecture, and controls the optimal ON–OFF times of the power switches, thereby settling the output voltage in a single ON–OFF switching with <inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{US}}$ </tex-math></inline-formula>, <inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{OS}}$ </tex-math></inline-formula>, and <inline-formula> <tex-math notation="LaTeX">$\text{t}_{\mathrm{S}}$ </tex-math></inline-formula> close to their respective theoretical minima. The converter is fabricated in a 0.18-<inline-formula> <tex-math notation="LaTeX">$ {\mu }\text{m}$ </tex-math></inline-formula> CMOS process with a 2.3-mm<sup>2</sup> chip area. For a 1-to-1.8 V (1.8-to-1 V) DVS transient, the measured <inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{OS}}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{US}}$ </tex-math></inline-formula>) is not observable, while the measured <inline-formula> <tex-math notation="LaTeX">$\text{t}_{\mathrm{S}}$ </tex-math></inline-formula> is 182 ns (192 ns). For a 1.8-A step-up (step-down) load transient, the measured <inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{US}}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{OS}}$ </tex-math></inline-formula>) and <inline-formula> <tex-math notation="LaTeX">$\text{t}_{\mathrm{S}}$ </tex-math></inline-formula> are 56 mV (45 mV) and 85 ns (76 ns), respectively. Compared with other state-of-the-arts, this brief’s <inline-formula> <tex-math notation="LaTeX">$\text{t}_{\mathrm{S}}$ </tex-math></inline-formula> in the DVS transient response is the closest to its theoretical minimum, while the ratios of <inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{US}}$ </tex-math></inline-formula>, <inline-formula> <tex-math notation="LaTeX">${ \Delta }\text{V}_{\mathrm{OS}}$ </tex-math></inline-formula>, and <inline-formula> <tex-math notation="LaTeX">$\text{t}_{\mathrm{S}}$ </tex-math></inline-formula> to their respective theoretical minima in the load transient response are comparable.