A forward body bias generator for digital CMOS circuits with supply voltage scaling
A forward body bias generator for digital CMOS circuits with supply voltage scaling
复制标题
用于具有电源电压缩放功能的数字 CMOS 电路的正向偏置发生器
DOI：
10.1109/iscas.2010.5537129
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发表时间：
2010
期刊：
影响因子：
--
通讯作者：
M. Vertregt
中科院分区：
文献类型：
--
作者：
M. Meijer;J. P. D. Gyvez;B. Kup;Bert van Uden;P. Bastiaansen;Marco Lammers;M. Vertregt
我们提出了一种新的完全集成的正向体偏置（FBB）发生器，保持其电压恒定相对于（可扩展的）电源的数字IP。该发生器是模块化的，可以驱动不同的数字IP块大小，最大可达lmm2。该设计已在90nm低功耗CMOS上实现。我们用于驱动高达1mm2的数字IP块的基本单元仅占用0.03mm2的硅面积。发生器在4μs内完成500 mV FBB电压阶跃。设计的带宽为570kHz。在标称工艺、1.2V电源和85°C条件下，FBB发生器的有功电流约为177μA。27°C时待机电流低至72 nA。
We propose a new fully-integrated forward body bias (FBB) generator that holds its voltage constant relative to the (scalable) power supply of a digital IP. The generator is modular and can drive distinct digital IP block sizes in multiples of up to lmm2. The design has been implemented in 90nm low-power CMOS. Our basic unit for driving digital IP blocks up to 1mm2 occupies a silicon area of 0.03mm2 only. The generator completes a 500mV FBB voltage step within 4μs. The bandwidth of the design is 570kHz. The active current of the FBB generator alone is about 177μA for a nominal process, 1.2V supply and 85°C. The standby current is as low as 72nA at 27°C.