10kV+ Rated SiC n-IGBTs: Novel Collector-Side Design Approach Breaking the Trade-Off between dV/dt and Device Efficiency
10kV+ Rated SiC n-IGBTs: Novel Collector-Side Design Approach Breaking the Trade-Off between dV/dt and Device Efficiency
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DOI：
10.4028/p-21h5lt
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发表时间：
2023-05
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通讯作者：
Ioannis Almpanis;Paul Evans;M. Antoniou;P. Gammon;L. Empringham;F. Udrea;P. Mawby;Neophytos Lophithis
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文献类型：
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作者：
Ioannis Almpanis;Paul Evans;M. Antoniou;P. Gammon;L. Empringham;F. Udrea;P. Mawby;Neophytos Lophithis
10 kV+额定4 H-碳化硅（SiC）绝缘栅双极晶体管（IGBT）有可能成为未来中压（MV）和高压（HV）功率转换器中的首选器件。然而，SiC IGBT的一个重要性能问题是在电感关断期间观察到的极快集电极电压上升（dV/dt）。对4 H-SiC IGBT高dV/dt物理机制的研究揭示了集电极侧设计在控制这一现象中的重要性。在本文中，我们提出了一种新的集电极侧的设计方法，它由四个n型层与优化的掺杂密度，并允许独立于器件性能的dV/dt的控制。此外，我们证明了dV/dt的降低87%，而不降低器件的高开关频率能力，或导通状态的性能，通过增加两个n型外延层在集电极侧，缓冲区和漂移区之间。
10kV+ rated 4H- Silicon Carbide (SiC) Insulated Gate Bipolar Transistors (IGBTs) have the potential to become the devices of choice in future Medium Voltage (MV) and High Voltage (HV) power converters. However, one significant performance concern of SiC IGBTs is the extremely fast collector voltage rise (dV/dt) observed during inductive turn-off. Studies on the physical mechanisms of high dV/dt in 4H-SiC IGBTs revealed the importance of collector-side design in controlling the phenomenon. In this paper we propose a novel collector-side design approach, which consists of four n-type layers with optimized doping densities and allows the control of dV/dt independently from the device performance. Further, we demonstrate a reduction of dV/dt by 87% without degrading the high switching frequency capability of the device, or the on-state performance, through the addition of two n-type epitaxial layers in the collector side, between the buffer and the drift regions.