A generic representation of CCSL time constraints for UML/MARTE models
A generic representation of CCSL time constraints for UML/MARTE models
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DOI：
10.1145/2744769.2744775
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发表时间：
2015-06
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影响因子：
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通讯作者：
Judith Peters;R. Wille;Nils Przigoda;U. Kühne;R. Drechsler
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作者：
Judith Peters;R. Wille;Nils Przigoda;U. Kühne;R. Drechsler
当今的嵌入式和网络物理系统的复杂性正在迅速增加，并在不可避免的设计过程中考虑了更高水平的抽象。在这种情况下，建模语言（例如UML及其概况（如Marte）的影响）正在增长。在这里，CCSL提供了对定时约束的正式描述，这些定时约束必须在考虑的系统上执行。这为许多进一步的设计步骤建立了基础，并且可以使用e。 g。用于检查规范的一致性，代码生成或证明是否在较低的抽象级别上正确实现了时间限制。但是，到目前为止，大多数可用的方法通常仅着眼于唯一的设计任务 - 即使没有明确考虑系统的功能行为。在这项工作中，我们的目标是通过提供一种方法来自动生成一组时钟约束的通用表示方法来克服这一缺点。之后，可以轻松地用于上述设计任务。关于通用描述的适用性以及示例性评估的讨论显示了拟议的通用表示的希望。
The complexity of today's embedded and cyber-physical systems is rapidly increasing and makes the consideration of higher levels of abstraction during the design process inevitable. In this context, the impact of modeling languages such as UML and its profiles such as MARTE is growing. Here, CCSL provides a formal description of timing constraints which have to be enforced on the considered system. This builds the basis for many further design steps and can be used e. g. for checking the consistency of the specification, for code generation, or for proving whether the time constraints have correctly been implemented at lower abstraction levels. However, most of the approaches available thus far usually focus on sole design tasks only - often even without an explicit consideration of the system's functional behavior. In this work, we are aiming for overcoming this drawback by providing a method to automatically generate a generic representation of a set of clock constraints in terms of a transition relation. Afterwards, the resulting transition relation can easily be utilized for the above mentioned design tasks. A discussion on the applicability of the generic description as well as an exemplary evaluation shows the promise of the proposed generic representation.