Quantitative analysis of very-low-voltage testing
Quantitative analysis of very-low-voltage testing
复制标题
极低电压测试的定量分析
DOI：
10.1109/vtest.1996.510876
复制
发表时间：
1996
期刊：
影响因子：
--
通讯作者：
E. McCluskey
中科院分区：
文献类型：
--
作者：
J. Chang;E. McCluskey
可以通过用非常低的电源电压在2和2.5倍的阈值电压v/ sub t/ t/ t/ t/ t/ t/ 2.5倍之间测试，可以检测到一些弱静态CMOS芯片。弱芯片是包含缺陷的缺陷，在额定条件下不会干扰正确的操作，但可能会导致间歇性或早期失败。本文考虑了几种类型的缺陷，并为其得出了测试条件。它还提出了两种用于确定非常低压测试的适当测试速度的方法。
Some weak static CMOS chips can be detected by testing them with a very low supply voltage-between 2 and 2.5 times the threshold voltage V/sub t/ of the transistors. A weak chip is one that contains a flaw-an imperfection that does not interfere with correct operation at rated conditions but which may cause intermittent or early-life failures. This paper considers several types of flaws and derives the test conditions for them. It also proposes two approaches for determining the appropriate test speed for very-low-voltage testing.