An energy-efficient 3D-stacked STT-RAM cache architecture for cloud processors: the effect on emerging scale-out workloads
An energy-efficient 3D-stacked STT-RAM cache architecture for cloud processors: the effect on emerging scale-out workloads
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DOI：
10.1007/s11227-017-2180-x
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发表时间：
2017-12
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影响因子：
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通讯作者：
Adnan Nasri;M. Fathy;A. Broumandnia
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作者：
Adnan Nasri;M. Fathy;A. Broumandnia
本文主要研究暗硅时代的主要问题——能耗问题。随着能源消耗成为云数据中心运行和维护的一个关键问题，云计算提供商越来越关注。在这里，我们展示了如何将自旋转移扭矩随机存取存储器（STT-RAM）用作片上L2缓存，以获得比传统L2缓存（如SRAM）更低的能量。高密度、快速读取和非易失性使STT-RAM成为片上存储器的重要技术。以前的研究主要是研究基于常见应用程序的具体方案，而没有对具有多种设计选项的新兴横向扩展应用程序进行全面分析。在这里，我们将通过运行新兴的向外扩展工作负载来讨论云处理器的性能和能源效率的不同前景。在CloudSuite基准测试上的实验结果表明，与SRAM方法相比，所提出的方法减少了51%（平均）的能量，并将能量延迟产品提高了37%（平均），其中每周期指令的退化仅为22%（平均）。
This paper focuses on energy consumption which is a major problem in the dark silicon era. As energy consumption becomes a key issue for operation and maintenance of cloud data centers, cloud computing providers are becoming significantly concerned. Here, we show how spin-transfer torque random access memory (STT-RAM) can be used as an on-chip L2 cache to obtain lower energy compared to conventional L2 caches, like SRAM. High density, fast read access and non-volatility make STT-RAM a significant technology for on-chip memories. Previous studies have mainly studied specific schemes based on common applications and do not provide a thorough analysis of emerging scale-out applications with multiple design options. Here, we discuss different outlooks consisting of performance and energy efficiency in cloud processors by running emerging scale-out workloads. Experiment results on the CloudSuite benchmarks show that the proposed method reduces energy by 51% (on average) and improves energy delay product by 37% (on average) where instruction per cycle degradation is only 22% (on average) compared to the SRAM method.