Layout decomposition for double patterning lithography
Layout decomposition for double patterning lithography
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DOI:
10.1109/iccad.2008.4681616
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发表时间:
2008
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通讯作者:
A. Kahng;Chul-Hong Park;Xu Xu-Xu;Hailong Yao
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文献类型:
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作者:
A. Kahng;Chul-Hong Park;Xu Xu-Xu;Hailong Yao
In double patterning lithography (DPL) layout decomposition for 45 nm and below process nodes, two features must be assigned opposite colors (corresponding to different exposures) if their spacing is less than the minimum coloring spacing [11, 9, 5]. However, there exist pattern configurations for which pattern features separated by less than the minimum color spacing cannot be assigned different colors. In such cases, DPL requires that a layout feature be split into two parts. We address this problem using a layout decomposition algorithm that includes graph construction, conflict cycle detection, and node splitting processes. We evaluate our technique on both real-world and artificially generated test cases in 45 nm technology. Experimental results show that our proposed layout decomposition method effectively decomposes given layouts to satisfy the key goals of minimized line-ends and maximized overlap margin. There are no design rule violations in the final decomposed layout.