Halide and GENESIS for Generating Domain-Specific Architecture of Guided Image Filtering

Halide and GENESIS for Generating Domain-Specific Architecture of Guided Image Filtering
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DOI:
10.1109/iscas.2019.8702260
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发表时间:
2019-05
期刊:
2019 IEEE International Symposium on Circuits and Systems (ISCAS)
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通讯作者:
Akari Ishikawa;Norishige Fukushima;Akira Maruoka;T. Iizuka
Akari Ishikawa;Norishige Fukushima;Akira Maruoka;T. Iizuka
中科院分区:
其他
文献类型:
--
作者:
Akari Ishikawa;Norishige Fukushima;Akira Maruoka;T. Iizuka

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Halide是一种特定领域的语言,用于cpu和gpu上的图像处理。该语言对于深度管道的图像处理非常强大,例如引导图像滤波。引导图像滤波被用于各种应用。一些论文在硬件上实现了滤波器;然而,实现硬件和目的是不同的。硬件实现是困难的;因此,编译器的支持是必要的。我们利用Halide扩展FPGA后端,称为GENESIS。在我们的实验中,带有CPU/FPGA后端的卤化物代码比优化后的c++代码要快。此外,用于CPU/FPGA的c++和Halide的代码长度分别为575,141,139行。
Halide is a domain-specific language for image processing on CPUs and GPUs. The language is powerful for image processing with deep pipeline, e.g., guided image filtering. The guided image filtering is utilized for various applications. Some papers implement the filter on hardware; however, the implementing hardware and the purposes are different. Hardware implementation is hard; therefore, compiler supports are necessary. We utilize Halide with extended FPGA backend, called GENESIS. In our experiment, Halide code with CPU/FPGA backend is faster than the optimized C++. Also, the code length of the C++ and Halide for CPU/FPGA is 575, 141, 139 lines, respectively.