PHMon: A Programmable Hardware Monitor and Its Security Use Cases
PHMon: A Programmable Hardware Monitor and Its Security Use Cases
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发表时间：
2020
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通讯作者：
Leila Delshadtehrani;Sadullah Canakci;Boyou Zhou;Schuyler Eldridge;A. Joshi;Manuel Egele
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作者：
Leila Delshadtehrani;Sadullah Canakci;Boyou Zhou;Schuyler Eldridge;A. Joshi;Manuel Egele
在硬件中实施各种安全策略在业界已经成为一种复兴的趋势。目前开发专用硬件安全扩展的趋势是一个不完善、冗长和昂贵的过程。与此趋势相反，灵活的硬件监视器可以随着安全威胁的发展有效地实施和增强各种安全策略。现有的硬件监视器通常存在以下一个（或多个）缺点：一组受限的监视操作、相当大的性能和电源开销，或侵入性设计。在本文中，我们提出了一种具有表现力的监控规则和灵活的细粒度操作的可编程硬件监视器（PHMon）的微创和高效实现。PHMon可以强制执行各种安全策略，还可以帮助检测软件错误和安全漏洞。我们在FPGA上的PHMon原型包括硬件监视器及其与RISC-V Rocket处理器的接口以及完整的Linux软件堆栈。我们通过四个不同的用例展示了PHMon的多功能性及其易于采用性：影子堆栈、硬件加速的模糊测试引擎、信息泄漏预防机制和硬件加速的调试器。我们的PHMon原型实现平均产生0.9%的性能开销，而硬件加速的模糊测试引擎比最先进的基于软件的实现平均提高了16倍的模糊测试性能。我们的PHMon的ASIC实现只会产生5%的功率开销和13.5%的面积开销。
There has been a resurgent trend in the industry to enforce a variety of security policies in hardware. The current trend for developing dedicated hardware security extensions is an imperfect, lengthy, and costly process. In contrast to this trend, a flexible hardware monitor can efficiently enforce and enhance a variety of security policies as security threats evolve. Existing hardware monitors typically suffer from one (or more) of the following drawbacks: a restricted set of monitoring actions, considerable performance and power overheads, or an invasive design. In this paper, we propose a minimally-invasive and efficient implementation of a Programmable Hardware Monitor (PHMon) with expressive monitoring rules and flexible fine-grained actions. PHMon can enforce a variety of security policies and can also assist with detecting software bugs and security vulnerabilities. Our prototype of PHMon on an FPGA includes the hardware monitor and its interface with a RISC-V Rocket processor as well as a complete Linux software stack. We demonstrate the versatility of PHMon and its ease of adoption through four different use cases: a shadow stack, a hardware-accelerated fuzzing engine, an information leak prevention mechanism, and a hardware-accelerated debugger. Our prototype implementation of PHMon incurs 0.9% performance overhead on average, while the hardware-accelerated fuzzing engine improves fuzzing performance on average by 16 × over the state-of-the art software-based implementation. Our ASIC implementation of PHMon only incurs a 5% power overhead and a 13.5% area overhead.