Pipelined architecture of high-speed RSA encryption processor using redundant binary arithmetic and table-look-up

Pipelined architecture of high-speed RSA encryption processor using redundant binary arithmetic and table-look-up
复制标题

使用冗余二进制算术和查表的高速RSA加密处理器的流水线结构

DOI:
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发表时间:
2004
期刊:
Proc.of 2004 IEEE International Conference on Electrical and Computer Engineering 3
影响因子:
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通讯作者:
Nobuhiro Tomabechi
Nobuhiro Tomabechi
中科院分区:
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文献类型:
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作者:
鈴木 旅人;大原 衛;新井 雅之;福本 聡;岩崎 一彦;Hirofumi Amano;Nobuhiro Tomabechi

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