GaN DHFETs Having 48% Power Added Efficiency and 57% Drain Efficiency at $V$ -Band
GaN DHFETs Having 48% Power Added Efficiency and 57% Drain Efficiency at $V$ -Band
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GaN%20DHFETs%20Having%2048%%20Power%20Added%20Efficiency%20and%2057%%20Drain%20Efficiency%20at%20$V$%20 频段
DOI：
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发表时间：
2017
影响因子：
4.9
通讯作者：
Y. Tang
中科院分区：
文献类型：
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作者：
M. Micovic;D. Brown;A. Kurdoghlian;D. Santos;B. Grabar;J. Magadia;I. Khalaf;H. Tai;E. Prophet;S. Burnham;J. Wong;D. Regan;H. Fung;Y. Tang
我们报告了最先进的 <inline-formula> <tex-math notation="LaTeX">$V$ </tex-math></inline-formula> 缩放的 40 nm 栅极长度 Al<sub>0.23</sub>Ga<sub>0.77</sub>N/AlN/GaN/Al<sub>0.08</sub>Ga<sub>0.92</sub>N 双异质结的带功率性能场效应晶体管（DHFET）。 <inline-formula> <tex-math notation="LaTeX">$200~mu ext{m}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">$4 imes 50 ~mu ext{m}$ </tex-math></inline-formula>) 预匹配 <inline-formula> 的宽 GaN DHFET <tex-math notation="LaTeX">$V$ </tex-math></inline-formula>-band (57–64 GHz) 的输出功率为 376 mW (1.88 W/mm)，功率附加效率 (PAE) 为 48%，漏极效率为 57%，在 59 GHz 频率下测得的相关增益超过 8 dB。据我们所知，这些结果代表了迄今为止在该频率下报告的固态器件的功率和 PAE 的最佳组合。这些结果是通过优化 GaN 异质结构实现的，该异质结构采用了通过极化效应限制电子的低铝含量背势垒、用于最小化短沟道效应的垂直缩放的 Al<sub>0.23</sub>Ga<sub>0.77</sub>N/AlN 栅极势垒叠层，以及通过分子束外延进行选择性 n<sup>+</sup> GaN 欧姆再生长工艺以降低寄生电阻。
We report the state-of-the-art <inline-formula> <tex-math notation="LaTeX">$V$ </tex-math></inline-formula>-band power performance of a scaled 40-nm gate length Al<sub>0.23</sub>Ga<sub>0.77</sub>N/AlN/GaN/Al<sub>0.08</sub>Ga<sub>0.92</sub>N double heterojunction field effect transistor (DHFET). The <inline-formula> <tex-math notation="LaTeX">$200~mu ext{m}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">$4 imes 50 ~mu ext{m}$ </tex-math></inline-formula>) wide GaN DHFETs pre-matched for <inline-formula> <tex-math notation="LaTeX">$V$ </tex-math></inline-formula>-band (57–64 GHz) have demonstrated an output power of 376 mW (1.88 W/mm) with 48% power-added efficiency (PAE), 57% drain efficiency, and more than 8 dB of associated gain measured at a frequency of 59 GHz. These results represent to the best of our knowledge the best combination of power and PAE reported to date at this frequency for a solid-state device. These results were achieved through optimization of the GaN heterostructure, which incorporates a low aluminum content back-barrier for electron confinement through polarization effects, a vertically scaled Al<sub>0.23</sub>Ga<sub>0.77</sub>N/AlN gate barrier stack for minimization of short-channel effects, and a selective n<sup>+</sup> GaN ohmic re-growth process by molecular beam epitaxy for reduction of parasitic resistance.