An Integrated Programmable Gate Timing Control and Gate Driver Chip for A 48V-to-0.75V Active-Clamp Forward Converter Power Block
An Integrated Programmable Gate Timing Control and Gate Driver Chip for A 48V-to-0.75V Active-Clamp Forward Converter Power Block
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用于 48V 至 0.75V 有源钳位正向转换器电源模块的集成可编程栅极时序控制和栅极驱动器芯片
DOI：
10.1109/ecce44975.2020.9235487
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发表时间：
2020
期刊：
影响因子：
--
通讯作者：
Xin Zhang
中科院分区：
文献类型：
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作者：
Dongkwun Kim;Yoshitaka Yamauchi;Xiaodong Meng;Tianyu Jia;Liam McAuliffe;T. Takken;K. Tien;S. Tian;Yuan Yao;Andrew Ferencz;Mingoo Seok;Xin Zhang
本文介绍了一种集成的可编程门定时控制和主门驱动器芯片的有源箝位正激转换器（ACFC）电源块的数据中心应用。ACFC电源模块可将48 V中间总线电压转换为主板上的处理器内核电压，具有高功率密度。为了提高整体效率和减小系统的形状因子，栅极时序控制功能和具有高电压电平移位器的栅极驱动器被集成在栅极驱动器芯片上。栅极驱动器芯片中的这些功能使电源模块能够优化开关晶体管的时序，从而实现最佳效率。芯片采用0.13 μ mBCD工艺制作。初始硬件在48 V输入和0.75 V输出电压下工作。全门定时控制功能已通过测量验证。该转换器的电气模型在130 A时显示出超过90%的效率。
This paper presents an integrated programmable gate timing control and primary gate driver chip for an active-clamp forward converter (ACFC) Power Block for data center applications. The ACFC Power Block converts 48 V intermediate bus voltage to processor core voltage on a motherboard with high power density. To improve the overall efficiency and reduce the system form factor, the gate timing control function and gate driver with a high voltage level shifter are integrated on a gate driver chip. These features in the gate driver chip enable the Power Block to optimize the timing of switching transistors and therefore achieve optimum efficiency. The silicon chip is fabricated in a 0.13 μm BCD process. Initial hardware operates at 48 V input and 0.75 V output voltages. Full gate timing control functions have been verified by measurement. An electrical model of this converter shows over 90% efficiency at 130 A.