Designing a Programmable Wire-Speed Regular-Expression Matching Accelerator
Designing a Programmable Wire-Speed Regular-Expression Matching Accelerator
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DOI：
10.1109/micro.2012.49
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发表时间：
2012-12
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影响因子：
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通讯作者：
J. V. Lunteren;C. Hagleitner;T. Heil;G. Biran;U. Shvadron;K. Atasu
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文献类型：
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作者：
J. V. Lunteren;C. Hagleitner;T. Heil;G. Biran;U. Shvadron;K. Atasu
越来越多的应用程序依赖于快速模式匹配来实时扫描数据，以实现安全性和分析目的。 IBM网络功率边缘（PowerEN）处理器中的REGX加速器使用快速可编程的状态机和简单处理单元的组合来支持这些应用速度。 REGX采用特殊规则缓存，并包含几个新的微构造功能，可为处理单元提供各种指令调度和执行选项。该体系结构将RISC哲学应用于特殊实用的计算：硬件提供快速，简单的原语，通常在单个周期中执行，该循环由智能编译器和系统软件利用高性能。这种方法提供了在各种工作量上取得良好性能所需的灵活性。正如Poweren处理器中实现的那样，加速器的理论峰值扫描速率为73.6 GBIT/s，用于典型的入侵检测工作负载，测量的扫描速率约为15至40 Gbit/s。
A growing number of applications rely on fast pattern matching to scan data in real-time for security and analytics purposes. The RegX accelerator in the IBM Power Edge of Network (PowerEN) processor supports these applications using a combination of fast programmable state machines and simple processing units to scan data streams against thousands of regular-expression patterns at state-of-the-art Ethernet link speeds. RegX employs a special rule cache and includes several new micro-architectural features that enable various instruction dispatch and execution options for the processing units. The architecture applies RISC philosophy to special-purpose computing: hardware provides fast, simple primitives, typically performed in a single cycle, which are exploited by an intelligent compiler and system software for high performance. This approach provides the flexibility required to achieve good performance across a wide range of workloads. As implemented in the PowerEN processor, the accelerator achieves a theoretical peak scan rate of 73.6 Gbit/s, and a measured scan rate of about 15 to 40 Gbit/s for typical intrusion detection workloads.