Crosstalk Induced Fault Analysis and Test in DRAMs

Crosstalk Induced Fault Analysis and Test in DRAMs
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DRAM 中串扰引起的故障分析与测试

DOI:
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发表时间:
2006
期刊:
Journal of electronic testing
影响因子:
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通讯作者:
S. Mourad
S. Mourad
中科院分区:
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文献类型:
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作者:
Zemo Yang;S. Mourad

文献摘要

被引文献

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分析了动态随机存取存储器制造过程中参数变化引起的串扰引起的故障的影响。重点放在读取操作上,这些操作对串扰和邻居数据模式很敏感。分析研究和数值模拟已经被用来研究读操作容易受到的一类串扰读故障(CRF)。结果表明,在每个物理RAM块和单元排列中都存在最坏情况的数据模式。当相邻位线和牺牲位线同时切换到相反的值时,发生最坏情况的数据模式。如果位线布置已知,则对CRF的测试相当微不足道。如果不了解内部芯片结构,则不能分配确定性图案,因此需要通用测试方法。本文提出了一种耗尽RAM块中任意3条或5条位线的每种状态的测试算法。
This study analyzes the effects of crosstalk-induced faults due to parameter variation during the manufacture of DRAMs. The focus is on read operations, which are sensitive to crosstalk and to neighborhood data patterns. Analytical studies and numerical simulations have been used to investigate a class of crosstalk reading faults (CRF) that read operations are susceptible to. The results reveal that there exist worst case data patterns in each physical RAM block and cell arrangement. The worst case data pattern occurs when neighboring and victim bit-lines switch to opposite values at the same time. If the bit-line arrangement is known, the test for the CRFs is quite trivial. If there is no knowledge of the internal chip structure, a deterministic pattern cannot be assigned and therefore a generic test method is needed. In this paper, a test algorithm is proposed that exhausts every state of any 3 or 5 bit-lines of a RAM block.