Design of 60GHz RF transceiver in CMOS: Challenges and recent advances
Design of 60GHz RF transceiver in CMOS: Challenges and recent advances
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DOI：
10.1109/cc.2014.6879001
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发表时间：
2014-08
影响因子：
4.1
通讯作者：
Li Lianming;Niu Xiaokang;Chen Linhui;Chai Yuan;Zhang Tao;Shimokawatoko Jun;Wang Aili;Luo Ying;He Long;Cheng Depeng;Liu Nan;Cui Tiejun;Y. Xiaohu
中科院分区：
文献类型：
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作者：
Li Lianming;Niu Xiaokang;Chen Linhui;Chai Yuan;Zhang Tao;Shimokawatoko Jun;Wang Aili;Luo Ying;He Long;Cheng Depeng;Liu Nan;Cui Tiejun;Y. Xiaohu
经过40多年的摩尔缩放，CMOS晶体管的速度约为100 GHz。这一事实使得在CMOS中实现毫米波电路成为可能。然而，随着宽带和低功耗的要求，60 GHz CMOS射频收发器面临着严峻的挑战。在回顾了技术问题之后，针对60 GHz应用，本文从系统和构建模块两个层面讨论了设计挑战，并给出了一些仿真或实测电路结果。
With more than 40 years Moore scaling, the speed of CMOS transistors is around 100 GHz. Such fact makes it possible to realize mm-wave circuits in CMOS. However, with the target of achieving broadband and power-efficient operation, 60 GHz CMOS RF transceiver faces severe challenges. After reviewing the technology issues, regarding the 60 GHz applications, this paper discusses design challenges both from the system and the building block levels, and also presents some simulated or measured circuits results.