Fan-in analysis of a leaky integrator circuit using charge transfer synapses
Fan-in analysis of a leaky integrator circuit using charge transfer synapses
复制标题
使用电荷转移突触对泄漏积分电路进行扇入分析
DOI:
10.1016/j.neucom.2018.06.065
复制
发表时间:
2018
期刊:
影响因子:
6
通讯作者:
Dowrick T
中科院分区:
文献类型:
--
作者:
Dowrick T
It is shown that a simple leaky integrator (LI) circuit operating in a dynamic mode can allow spatial and temporal summation of weighted synaptic outputs. The circuit incorporates a current mirror configuration to sum charge packets released from charge transfer synapses and an n-channel MOSFET, operating in subthreshold, serves to implement a leakage capability, which sets the decay time for the postsynaptic response. The focus of the paper is to develop an analytical model for fan-in and validate the model against simulation and experimental results obtained from a prototype chip fabricated in the AMS 0.35 µm mixed signal CMOS technology. We show that the model predicts the theoretical limit on fan-in, relates the magnitude of the postsynaptic response to weighted synaptic inputs and captures the transient response of the LI when stimulated with spike inputs.
影响因子:
--
作者:
J. Wojtowicz;H. Atwood
通讯作者:
H. Atwood
影响因子:
7.8
作者:
S. Renaud;J. Tomas;N. Lewis;Y. Bornat;A. Daouzli;Michael Rudolph;A. Destexhe;S. Saïghi
通讯作者:
S. Saïghi