PISCES: Power-Aware Implementation of SLAM by Customizing Efficient Sparse Algebra
PISCES: Power-Aware Implementation of SLAM by Customizing Efficient Sparse Algebra
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DOI：
10.1109/dac18072.2020.9218550
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发表时间：
2020-07
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影响因子：
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通讯作者：
Bahar Asgari;Ramyad Hadidi;Nima Shoghi Ghaleshahi;Hyesoon Kim
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作者：
Bahar Asgari;Ramyad Hadidi;Nima Shoghi Ghaleshahi;Hyesoon Kim
在自治系统中，同步定位和绘图是一项关键的实时任务。虽然先前的工作已经提出了硬件加速器来实时处理SLAM，但他们很少关注功耗。为了提高功耗效率，我们提出了双鱼座，它通过利用稀疏性来共同优化功耗和延迟，这是SLAM在以前的工作中遗漏的一个关键特征。通过编排稀疏数据，双鱼座可以对齐相关数据，并实现对片上内存的确定性、一次性和并行访问。因此，双鱼座(i)消除了不必要的内存访问，（ii）实现了流水线和并行处理。我们的FPGA实现表明，双鱼座的功耗比目前的水平低2.5倍，执行SLAM的速度快7.4倍。
A key real-time task in autonomous systems is simultaneous localization and mapping (SLAM). Although prior work has proposed hardware accelerators to process SLAM in real time, they paid less attention to power consumption. To be more power-efficient, we propose Pisces, which co-optimizes power consumption and latency by exploiting sparsity, a key characteristic of SLAM missed in prior work. By orchestrating sparse data, Pisces aligns correlated data and enables deterministic, one-time, and parallel accesses to the on-chip memory. Therefore, Pisces (i) eliminates unnecessary memory accesses and (ii) enables pipelined and parallel processing. Our FPGA implementation shows that Pisces consumes 2.5× less power and executes SLAM 7.4× faster than the state of the art.