Secure Cache Modeling for Measuring Side-channel Leakage
Secure Cache Modeling for Measuring Side-channel Leakage
复制标题
用于测量侧通道泄漏的安全缓存建模
DOI:
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发表时间:
2014
期刊:
影响因子:
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通讯作者:
Ee
中科院分区:
文献类型:
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作者:
Uby;L. B.;Ee
Side-channel attacks try to break a system’s confidentiality using physical information emitted from the targeted system. Such information is leaked out through cache side channels, which can exist in many parts of the system. Cache memories are a potential source of information leakage through side-channel attacks, many of which have been proposed. Meanwhile, different cache architectures have also been proposed to defend against these attacks. Thus it is necessary to evaluate the effectiveness of the proposed defense approaches. In this paper, we propose two methods to evaluate a system’s vulnerability to cache side-channel attacks. First, we run actual attack programs and recover the cipher keys to directly show if the target system is attackable through such side-channel attacks. We also provide a new key-vote metric to quantify the system’s vulnerability to the attack. The actual attack is accurate, but is slow and cipher specific. Hence, we propose a second method based on new models of cache architectures and their information leakage potential. We define a novel Interference Matrix to evaluate a system’s vulnerability to entire categories of cache side-channel attacks, rather than to a specific attack. These models can give more comprehensive conclusions on a system’s vulnerability to side channel attacks. Finally we check whether the two methods give consistent results.